- (C2 Elapsed – C3 Wait) /C2 CPU
- So what’s a reasonable ratio?
– IMS / CICS transactions <1.5
– TSO Short <5.0
– TSO Long <10.0 + or -
– Batch <10.0 + or - - This is affected by:
– Processor busy rate and system paging
– Address Space dispatching priorities
An area that is often overlooked is the overall system overhead. If the dispatching priorities for all the address spaces do not have the correct relationship, varying amounts of overhead will slow your work.
Is your processor more than 95% busy on a regular basis? If so, your performance is hurt by the machine busy rate. Running at 100% is not a case of using the machine to its fullest capacity – it’s a case of hurting all performance because the processor is overloaded!